As a power converting apparatus for performing AC-AC conversion which is not provided with power storing means for DC link, there are known a matrix converter and an AC/DC/AC direct type power converter (hereinafter, referred to as “direct power converter”) (for example, see Lixiang Wei and Thomas A. Lipo, “A Novel Matrix Converter Topology with Simple Commutation”, IEEE IAS 2001, vol. 3, 2001, pp. 1749-1754 below). They do not employ a large electrolytic capacitor, and thus excel at miniaturization and longevity.
In a direct power converter, a converter and an inverter each subjected to pulse width modulation (PWM) control are connected via a pair of power supply lines functioning as a DC link In the DC link, a power converting apparatus, which is shown by a smoothing capacitor as an example, is omitted.
There is known that a switching pattern of the matrix converter is obtained by virtualizing a power converter in which a converter and an inverter each subjected to PWM control are connected via a DC link, and subjecting a switching pattern of the virtualized power converter to matrix conversion (for example, see Rie Itoh and Isao Takahashi, “Decoupling Control of Input and Output Reactive Power of the Matrix Converter”, IEEJ Technical Meeting on Semiconductor Power Converter, SPC-01-121, 2001 below). Therefore, a direct power converter will be mainly described below.
FIG. 1 is a circuit diagram showing one mode of a direct power converter. A converter 1 and an inverter 2 are connected by a pair of DC power supply lines LH and LL. Input terminals Pr, Ps and Pt of the converter 1 receive a three-phase AC voltage, and are connected to the DC power supply line LH via switch devices Srp, Ssp and Stp on an upper arm side, respectively. In addition, the input terminals Pr, Ps and Pt are connected to the DC power supply line LL via switch devices Srn, Ssn and Stn on a lower arm side, respectively.
Output terminals Pu, Pv and Pw of the inverter 2 output the three-phase AC voltage, and are connected to the DC power supply line LH via switch devices Sup, Svp and Swp on the upper arm side, respectively. In addition, the output terminals Pu, Pv and Pw are connected to the DC power supply line LL via switch devices Sun, Svn and Swn on the lower arm side, respectively.
In the direct power converter, the switch devices Srp, Ssp and Stp on the upper arm side of the converter 1 and the switch devices Srn, Ssn and Stn on the lower arm side thereof are brought into conduction in an alternative manner for avoiding short-circuit of the input terminals Pr, Ps and Pt. Further, for avoiding short-circuit of the DC power supply lines LH and LL, the switch device on the upper arm side of the converter 1 and the switch device on the lower arm side thereof, which correspond to the same phase, are brought into conduction in an alternative manner.
The above-mentioned switching (commutation) of the converter 1 is desirably performed in a state in which current does not flow through the DC power supply lines LH and LL. In order to achieve such a state, the output terminals Pu, Pv and Pw of the inverter 2 are short-circuited, to thereby generate a state which is referred to as a so-called zero voltage vector. Specifically, the switch devices Sup, Svp and Swp on the upper arm side are all brought into conduction and all of the switch devices Sun, Svn and Swn on the lower arm side are brought into non-conduction (state referred to as a voltage vector V7). Alternatively, the switch devices Sup, Svp and Swp on the upper arm side are all brought into non-conduction and all of the switch devices Sun, Svn and Swn on the lower arm side are brought into conduction (state referred to as a voltage vector V0).
However, also in the inverter 2, the switch device on the upper arm side and the switch device on the lower side, which correspond to the same phase, are brought into conduction in an alternative manner for avoiding short-circuit between the DC power supply lines LH and LL. Accordingly, in switching of the switch devices of the inverter 2, a certain period called a dead time is provided for preventing periods in each which the switching device corresponding to the same phase is brought into conduction from overlapping each other. Then, in this period, there is provided a period in which a pair of switching devices corresponding to the same phase are brought into non-conduction (for example, see Koji Kato and Jun-ichi Itoh, “Improvement of Waveform for a Boost type AC/DC/AC Direct Converter”, Year 2007 IEEJ National Convention 4-098, 2007, pp. 153 and 154 and Koji Kato and Jun-ichi Itoh, “Improvement of Waveform for a Boost type AC/DC/AC Direct Converter Focused on Input Current” Year 2007 IEEJ Industry Applied Section Meeting 1-31, pp. 279-282 below).
Further, as patent documents related to the present invention, there are Takaharu Takeshita, Koji Toyama and Nobuyuki Matsui, “PWM Scheme for Current Source Three-Phase Inverters and Converters”, IEEJ Transactions on Industry Applications, Vol. 116, No. 1, 1996, pp. 106-107 and Japanese Patent Application Laid-Open No. 2004-222337 and Japanese Patent Application Laid-Open No. 06-81514.